A semiconductor or integrated circuit (IC) device may comprise many miniaturized circuits implemented in a semiconductor substrate. IC devices must be tested in order to ensure proper operation before they are used. IC devices can be tested in a limited fashion using built-in self test (BIST) circuitry that is implemented within the IC devices themselves. BIST testing however, is incomplete and does not test all aspects of operation. Thorough testing of an IC device is accomplished with complex external testing equipment. In order for complex test equipment to be used, many dedicated input/output (I/O) pins are typically required for allowing the test equipment to input various test patterns, codes, and data, and to stress the circuitry of the IC device. In an environment where multiple IC devices are combined within a single package, however, it may be desirable to limit the total number of I/O pins or leads, for example, so that the package with multiple IC devices fits into a similar size “footprint” as a package containing only one of the IC devices. Furthermore, for such components having multiple IC devices contained therein but with a limited number of input/output leads, it can be difficult if not impossible to use external testing equipment for testing the IC devices thoroughly.